Khan Lab

Electronics with Ferroelectric and Quantum Materials

Publications

PUBLICATIONS

Google Scholar Page

  1. Venkatesan, P., Fernandes, L., Kang, S., Ravikumar, P., Song, T., Park, C., … & Khan, A. (2025). Pushing the limits of NAND technology scaling with ferroelectrics. MRS Bulletin, 1-14.
  2. Tian, M., Cheng, J., Afroze, N., Yang, Y., Khan, A., & Kacher, J. (2025). Ultra-Thin Plan-View Lamella Made by Focused Ion Beam. Ultramicroscopy, 114250.
  3. Afroze, N., Fahrvandi, H., Ren, G., Kumar, P., Nelson, C., Lombardo, S., … & Khan, A. (2025). Atomic-scale confinement of strongly charged 180 degree domain wall pairs in ZrO2. arXiv preprint arXiv:2507.18920.
  4. Tian, M., Afroze, N., Kacher, J., & Khan, A. (2025). Lift-Out Technique for Ultra-Thin Plan-View Lamella Preparation Using Focused Ion Beam. Microscopy and Microanalysis, 31(Supplement_1), ozaf048.015.
  5. Chen, J., Wang, Z., Yom, T., Zhang, C., Losego, M. D., & Khan, A. I. (2025). Chemical reactions and crystallization behavior in thermal ALD of BaTiO3 thin films from bis-(1, 2, 4 triisopropylcyclopentadienyl)-barium and titanium isopropoxide precursors. Journal of Vacuum Science & Technology A, 43(4).
  6. Quezada, E., Sarkar, E., Chakraborty, D., Park, H., Zhang, C., Tian, M., … (2025). Dipole Engineered Gate Stacks in AOS Channel FETs to Overcome the VT-ION Tradeoff. 2025 Device Research Conference (DRC), 1-2.
  7. Chakraborty, D., Sarkar, E., Park, H., Lee, H. J., Quezada, E., Zhang, C., … (2025). Overcoming Mobility-Stability Trade-off by Gate Stack Engineering in BEOL Compatible Ga Doped In2O3 MOSFETs. 2025 Device Research Conference (DRC), 1-2.
  8. Shon, M., Park, C., Ravindran, P. V., Fernandes, L., Lee, J., Kim, K., … (2025). A Comprehensive Modeling of Gate Stack Interlayer Engineering for Ferroelectric Vertical NAND. 2025 Device Research Conference (DRC), 1-2.
  9. Park, C., Ravikumar, P., Venkatesan, P., Fernandes, L., Soliman, S., Chen, J., … & Khan, A. (2025). Endurance Enhancement in Low Operating Voltage Scavenged SOI FEFETs. 2025 Device Research Conference (DRC), 1-2.
  10. Kim, K., Dipjyoti, D. A. S., Kim, K., Kim, W., Lim, S., Daewon, H. A., Khan, A., … (2025). Ferroelectric gate stack with tunnel dielectric insert for nand applications. US Patent App. 18/815,936.
  11. Ravikumar, P., Venkatesan, P., Park, C., Afroze, N., Tian, M., Chern, W., … & Khan, A. (2025). The First Switch Effect in Ferroelectric Field-Effect Transistors. IEEE Transactions on Device and Materials Reliability.
  12. Venkatesan, P., & Khan, A. (2025). Ferroelectrics for Vertical NAND Flash Applications. 2025 IEEE International Memory Workshop (IMW), 1-4.
  13. Sarkar, E., Chakraborty, D., Wang, W. C., Aabrar, K. A., Kirtania, S. G., Phadke, O., …  (2025). Analog In-Memory-Compute with Multi-bit Silicon Ferro FinFET Array for Improved Energy and Area Efficiency. 2025 IEEE International Memory Workshop (IMW), 1-4.
  14. Fernandes, L., Venkatesan, P., Tian, M., Kuo, Y. H., Afroze, N., Soliman, S., … & Khan, A. (2025). Comparative Study of Channel Materials for Ferroelectric NAND Applications. 2025 IEEE International Memory Workshop (IMW), 1-4.
  15. Duan, J., Khan, A., Gong, X., Narayanan, V., & Ni, K. (2025). A Full Spectrum of 3D Ferroelectric Memory Architectures Shaped by Polarization Sensing. arXiv preprint arXiv:2504.09713.
  16. Kirtania, S. G., Park, H., Phadke, O., Sarkar, E., Chakraborty, D., Waqar, F. G., …  (2025). Amorphous Indium Oxide Channel FEFETs With Write Voltage of 0.9 V and Endurance >10^12 for Refresh-Free Embedded Memory. IEEE Transactions on Electron Devices.
  17. Padovani, A., Afroze, N., Kuo, Y. H., Ravikumar, P. G., Ravindran, P. V., Tian, M., …  (2025). Multi-Scale Modeling-Driven Material to Device Co-Optimization of Ferroelectric Capacitors with Oxygen Reservoir Layer (ORL) for Improved Endurance. 2025 IEEE International Reliability Physics Symposium (IRPS), 1-6.
  18. Shon, M., Park, C., Ravindran, P. V., Fernandes, L., Kim, K., Woo, J., …  (2025). Modeling Dynamic Interplay Between Charge Traps and Polarization for Memory Window Enhancement in Gate Injection Layers. 2025 IEEE International Reliability Physics Symposium (IRPS), 1-5.
  19. Ravikumar, P., Padovani, A., Venkatesan, P., Park, C., Afroze, N., Tian, M., … & Khan, A. (2025). Understanding Correlation Between Memory Window Closure, Leakage and Read Delay Effects for FEFET Reliability Improvement: Role of IL and FE Traps. 2025 IEEE International Reliability Physics Symposium (IRPS), 1-5.
  20. Venkatesan, P., Padovani, A., Fernandes, L., Ravikumar, P., Park, C., Tran, H., … & Khan, A. (2025). Enhanced Memory Performance in Ferroelectric NAND Applications: The Role of Tunnel Dielectric Position for Robust 10-Year Retention. 2025 IEEE International Reliability Physics Symposium (IRPS), 1-7.
  21. Phadke, O., Ravindran, P. V., Mulaosmanovic, H., Dünkel, S., Beyer, S., Khan, A., … (2025). Impact of the Endurance Measurement Methodology on Ferroelectric Field Effect Transistor Under the Capacitive Nondestructive Read. IEEE Transactions on Electron Devices.
  22. Venkatesan, P., & Khan, A. (2025). Ferroelectric 3D NAND Storage. 2025 9th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 1-3.
  23. Kashyap, H., Lee, P. C., Chae, K., Passlack, M., Yadav, A. K., Wong, K., … (2025). Si-doped HZO and ZrO2 for hysteresis free high-k dielectric. Journal of Vacuum Science & Technology A, 43(2).
  24. Sarkar, E., Zhang, C., Chakraborty, D., Kirtania, S. G., Aabrar, K. A., Park, H., … (2025). First Demonstration of High-Performance and Extremely Stable W-Doped In2O3 Gate-All-Around (GAA) Nanosheet FET. IEEE Transactions on Electron Devices.
  25. Woo, S., Choe, G., Khan, A. I., Datta, S., & Yu, S. (2025). Design of Superlattice Ferroelectric-Metal Field-effect Transistor for triple-level cell 3D NAND flash. Microelectronic Engineering, 295, 112276.
  26. Venkatesan, P., Fernandes, L., Ravikumar, P., Park, C., Tran, H., Wang, Z., … & Khan, A. (2024). Demonstration of Robust Retention in Band engineered FEFETs for NAND Storage Applications using Tunnel Dielectric Layer. IEEE Electron Device Letters.
  27. Kirtania, S. G., Phadke, O., Sarker, E., Aabrar, K. A., Chakraborty, D., Waqar, F., …  (2024). Amorphous Indium Oxide Channel FeFETs with Write Voltage of 0.9V and Endurance >10^12 for Refresh-Free 1T-1FeFET Embedded Memory. 2024 IEEE International Electron Devices Meeting (IEDM), 1-4.
  28. Sarkar, E., Zhang, C., Chakraborty, D., Waqar, F. G., Kirtania, S., Aabrar, K. A., …(2024). First Demonstration of W-Doped In2O3 Gate-All-Around (GAA) Nanosheet FET with Improved Performance and Record Threshold Voltage Stability. 2024 IEEE International Electron Devices Meeting (IEDM), 1-4.
  29. Afroze, N., Padovani, A., Choi, J., Ravikumar, P. G., Kuo, Y. H., Zhang, C., … & Khan, A. (2024). Self-Healing Ferroelectric Capacitors with ~1000x Endurance Improvement at High Temperatures (85–125°C). 2024 IEEE International Electron Devices Meeting (IEDM), 1-4.
  30. Lee, J., Zhang, C., Shon, M., Read, J., Deng, S., Phadke, O., …  (2024). BEOL-Compatible Non-Volatile Capacitive Synapse with ALD W-Doped In2O3 Semiconductor Layer. 2024 IEEE International Electron Devices Meeting (IEDM), 1-4.
  31. Qin, Y., Chakraborty, S., Zhao, Z., Kim, K., Lim, S., Woo, J., … (2024). Clarifying the Role of Ferroelectric in Expanding the Memory Window of Ferroelectric FETs with Gate-Side Injection: Isolating Contributions from Polarization and Charge Trapping. 2024 IEEE International Electron Devices Meeting (IEDM), 1-4.
  32. Fernandes, L., Ravindran, P. V., Chen, J., Tian, M., Das, D., Chen, H., … & Khan, A. (2024). Optimizing Memory Window for Ferroelectric Nand Applications: An Experimental Study on Dielectric Material Selection and Layer Positioning. IEEE Transactions on Electron Devices.
  33. Noor, M., Bergschneider, M., Kim, J., Afroze, N., Khan, A. I., Chang, S. C., … (2024). Nearly Barrierless Polarization Switching Mechanisms in ZrO2 Having Perpendicular In-Plane Domain Walls. ACS Applied Materials & Interfaces, 16(45), 62282-62291.
  34. Ravikumar, P. G., Park, C., Ravindran, P. V., Afroze, N., Tian, M., Chern, W., … & Khan, A. (2024). First write pulse-induced interface damage in ferroelectric field-effect transistors. 2024 IEEE International Integrated Reliability Workshop (IIRW), 1-4.
  35. Venkatesan, P., Park, C., Song, T., Fernandes, L., Das, D., Afroze, N., … & Khan, A. (2024). Disturb and its mitigation in Ferroelectric Field-Effect Transistors with Large Memory Window for NAND Flash Applications. IEEE Electron Device Letters.
  36. Fernandes, L., Ravindran, P. V., Song, T., Das, D., Park, C., Afroze, N., … & Khan, A. (2024). Material choices for Tunnel Dielectric Layer and Gate Blocking Layer for Ferroelectric NAND Applications. IEEE Electron Device Letters.
  37. Park, C., Ravindran, P. V., Das, D., Ravikumar, P. G., Zhang, C., Afroze, N., … & Khan, A. (2024). Plasma-Enhanced Atomic Layer Deposition Based Ferroelectric Field-Effect Transistors. IEEE Journal of the Electron Devices Society.
  38. Kumarasubramanian, H., Ravindran, P. V., Liu, T. R., Song, T., Surendran, M., … (2024). Kinetic control of ferroelectricity in ultrathin epitaxial Barium Titanate capacitors. arXiv preprint arXiv:2407.13953.
  39. Datta, S., Sarkar, E., Aabrar, K., Deng, S., Shin, J., Raychowdhury, A., …  (2024). Amorphous Oxide Semiconductors for Monolithic 3D Integrated Circuits. 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
  40. Das, D., Fernandes, L., Ravindran, P. V., Song, T., Park, C., Afroze, N., … & Khan, A. (2024). Design Framework for Ferroelectric Gate Stack Engineering of Vertical NAND Structures for Efficient TLC and QLC Operation. 2024 IEEE International Memory Workshop (IMW), 1-4.
  41. Ravikumar, P. G., Ravindran, P. V., Aabrar, K. A., Song, T., Kirtania, S. G., Das, D., … & Khan, A. (2024). Comprehensive Time Dependent Dielectric Breakdown (TDDB) Characterization of Ferroelectric Capacitors Under Bipolar Stress Conditions. 2024 IEEE International Reliability Physics Symposium (IRPS), 1-5.
  42. Passlack, M., Tasneem, N., Park, C., Ravindran, P. V., Chen, H., Das, D., …  (2024). The origin of memory window closure with bipolar stress cycling in silicon ferroelectric field-effect-transistors. Journal of Applied Physics, 135(13).
  43. Das, D., Park, H., Wang, Z., Zhang, C., Ravindran, P. V., Park, C., … & Khan, A. (2024). Ferroelectric Gate Stack Engineering with Tunnel Dielectric Insert for Achieving High Memory Window in FEFETs for NAND Applications. 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 1-3.
  44. Aabrar, K. A., Kirtania, S. G., Deng, S., Choe, G., Khan, A., Yu, S., & Datta, S. (2023). Improved Reliability and Enhanced Performance in BEOL Compatible W-doped In2O3 Dual-Gate Transistor. 2023 International Electron Devices Meeting (IEDM), 1-4.
  45. Das, D., Park, H., Wang, Z., Zhang, C., Ravindran, P. V., Park, C., … & Khan, A. (2023). Experimental demonstration and modeling of a ferroelectric gate stack with a tunnel dielectric insert for NAND applications. 2023 International Electron Devices Meeting (IEDM), 1-4.
  46. Ravikumar, P. G., & Khan, A. (2023). Reliability of ferroelectric devices. Elsevier.
  47. Kim, T. H., Phadke, O., Luo, Y. C., Mulaosmanovic, H., Mueller, J., Duenkel, S., …  (2023). Tunable Non-volatile Gate-to-Source/Drain Capacitance of FeFET for Capacitive Synapse. IEEE Electron Device Letters.
  48. Durham, D. B., Aabrar, K. A., Ravindran, P. V., Zaluzec, N. J., Stan, L., Khan, A. I., … (2023). Quantitative Electrostatic Potential Mapping in Dense Polycrystalline Functional Materials and Devices. Microscopy and Microanalysis, 29(Supplement_1), 280-281.
  49. Park, C., Kashyap, H., Das, D., Hur, J., Tasneem, N., Lombardo, S., … & Khan, A. (2023). Interfacial Oxide Layer Scavenging in Ferroelectric Hf0.5Zr0.5O2-Based MOS Structures With Ge Channel for Reduced Write Voltages. IEEE Transactions on Electron Devices, 70(8), 4479-4483.
  50. Ravindran, P. V., Ravikumar, P. G., & Khan, A. I. (2023). Conditions for Domain-Free Negative Capacitance. IEEE Transactions on Electron Devices.
  51. Khan, A., Chern, W., Luo, Y. C., Tasneem, N., Wang, Z., & Yu, S. (2023). Methods of Operating Ferroelectric (Fe) FET Based Non-Volatile Memory Circuits and Related Control Circuits. US Patent App. 18/063,297.
  52. Kirtania, S. G., Aabrar, K. A., Khan, A. I., Yu, S., & Datta, S. (2023). Cold-FeFET as Embedded Non-Volatile Memory with Unlimited Cycling Endurance. 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
  53. Woo, S., Choe, G., Khan, A. I., Datta, S., & Yu, S. (2023). Design of Ferroelectric-Metal Field-Effect Transistor for Multi-Level-Cell 3D NAND Flash. 2023 IEEE International Memory Workshop (IMW), 1-4.
  54. Phadke, O., Aabrar, K. A., Luo, Y., Kirtania, S. G., Khan, A. I., Datta, S., & Yu, S. (2023). Low-Frequency Noise Characteristics of Ferroelectric Field-Effect Transistors. 2023 IEEE International Reliability Physics Symposium (IRPS), 1-4.
  55. Choe, G., Ravindran, P. V., Hur, J., Lederer, M., Reck, A., Khan, A., & Yu, S. (2023). Machine Learning-Assisted Statistical Variation Analysis of Ferroelectric Transistor: From Experimental Metrology to Adaptive Modeling. IEEE Transactions on Electron Devices, 70(4), 2015-2020.
  56. Tasneem, N., Wang, Z., Chen, H., Yu, S., Chern, W., & Khan, A. (2023). Immediate Read-After-Write Capability in p-Type Ferroelectric Field-Effect Transistors and Its Evolution With Fatigue Cycling. IEEE Transactions on Device and Materials Reliability, 23(1), 142-146.
  57. Das, D., Ravindran, P. V., Park, C., Tasneem, N., Wang, Z., Chen, H., … & Khan, A. (2022). A Ge-Channel Ferroelectric Field Effect Transistor with Logic-Compatible Write Voltage. IEEE Electron Device Letters.
  58. Passlack, M., Tasneem, N., Wang, Z., Aabrar, K. A., Hur, J., Chen, H., …  (2022). Direct Quantitative Extraction of Internal Variables from Measured PUND Characteristics Providing New Key Insights into Physics and Performance of Silicon and Oxide Channel Ferroelectric FETs. 2022 International Electron Devices Meeting (IEDM), 32.4.1-32.4.4.
  59. Tasneem, N., Kashyap, H., Chae, K., Park, C., Lee, P., Lombardo, S. F., … & Khan, A. (2022). Remote Oxygen Scavenging of the Interfacial Oxide Layer in Ferroelectric Hafnium–Zirconium Oxide-Based Metal–Oxide–Semiconductor Structures. ACS Applied Materials & Interfaces.
  60. Hur, J., Park, C., Choe, G., Ravindran, P. V., Khan, A. I., & Yu, S. (2022). Characterizing HfO2-Based Ferroelectric Tunnel Junction in Cryogenic Temperature. IEEE Transactions on Electron Devices, 69(10), 5948-5951.
  61. Chae, K., Lombardo, S. F., Tasneem, N., Tian, M., Kumarasubramanian, H., … (2022). Local Epitaxial Templating Effects in Ferroelectric and Antiferroelectric ZrO2. ACS Applied Materials & Interfaces.
  62. Wang, Z., Tasneem, N., Chen, H., Yu, S., Chern, W., & Khan, A. (2022). Improved Endurance with Electron-Only Switching in Ferroelectric Devices. 2022 Device Research Conference (DRC), 1-2.
  63. Choe, G., Ravindran, P. V., Lu, A., Hur, J., Lederer, M., Reck, A., …  (2022). Machine Learning Assisted Statistical Variation Analysis of Ferroelectric Transistors: From Experimental Metrology to Predictive Modeling. 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
  64. Luo, Y. C., Ye, H., Chakraborty, W., Hur, J., Ravindran, P. V., Khan, A. I., … (2022). Low-Frequency Noise Characteristics of BEOL-Compatible IWO Transistor. 2022 IEEE Silicon Nanoelectronics Workshop (SNW), 1-2.
  65. Gaskell, A. A., Wang, Z., Dopita, M., Kriegner, D., Tasneem, N., & Khan, A. I. (2022). The Effect of Annealing Temperature on Antiferroelectric Zirconia. 2022 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA).
  66. Wang, Z., Tasneem, N., Hur, J., Chen, H., Yu, S., Chern, W., & Khan, A. (2022). Standby Bias Improves the Endurance in Ferroelectric Field Effect Transistors due to Fast Neutralization of Interface Traps. 2022 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA).
  67. Hoffmann, M., Wang, Z., Tasneem, N., Zubair, A., Ravindran, P. V., Tian, M., …  (2022). Antiferroelectric negative capacitance from a structural phase transition in zirconia. Nature Communications, 13(1), 1-8.
  68. Ravindran, P. V., & Khan, A. I. (2022). Quantum phase transition in ferroelectric-paraelectric heterostructures. arXiv preprint arXiv:2203.02058.
  69. Ravindran, P. V., & Khan, A. I. (2022). Quantum phase transition in ferroelectric-paraelectric heterostructures. arXiv e-prints, arXiv:2203.02058.
  70. Wang, Z., Tasneem, N., Islam, M. M., Chen, H., Hur, J., Chern, W., … & Khan, A. (2022). An Empirical Compact Model for Ferroelectric Field-Effect Transistor Calibrated to Experimental Data. IEEE Transactions on Electron Devices.
  71. Aabrar, K. A., Kirtania, S. G., Liang, F. X., Gomez, J., San Jose, M., Luo, Y., …  (2022). BEOL-Compatible Superlattice FEFET Analog Synapse With Improved Linearity and Symmetry of Weight Update. IEEE Transactions on Electron Devices.
  72. Tasneem, N., Islam, M. M., Wang, Z., Zhao, Z., Upadhyay, N., Lombardo, S. F., … & Khan, A. (2022). Efficiency of Ferroelectric Field-Effect Transistors: An Experimental Study. IEEE Transactions on Electron Devices, 69(3), 1568-1574.
  73. Hur, J., Luo, Y. C., Lu, A., Wang, T. H., Li, S., Khan, A. I., & Yu, S. (2022). Nonvolatile Capacitive Crossbar Array for In-Memory Computing. Advanced Intelligent Systems, 2100258.
  74. Luo, Y. C., Hur, J., Wang, T. H., Lu, A., Li, S., Khan, A. I., & Yu, S. (2021). Experimental demonstration of non-volatile capacitive crossbar array for in-memory computing. 2021 IEEE International Electron Devices Meeting (IEDM), 1-4.
  75. Wang, Z., Tasneem, N., Hur, J., Chen, H., Yu, S., Chern, W., & Khan, A. (2021). Standby Bias Improvement of Read After Write Delay in Ferroelectric Field Effect Transistors. 2021 IEEE International Electron Devices Meeting (IEDM), 19.3.1-19.3.4.
  76. Tasneem, N., Wang, Z., Zhao, Z., Upadhyay, N., Lombardo, S., Chen, H., … & Khan, A. (2021). Trap Capture and Emission Dynamics in Ferroelectric Field-Effect Transistors and their Impact on Device Operation and Reliability. 2021 IEEE International Electron Devices Meeting (IEDM), 6.1.1-6.1.4.
  77. Aabrar, K. A., Gomez, J., Kirtania, S. G., San Jose, M., Luo, Y., Ravikumar, P. G., … (2021). BEOL Compatible Superlattice FerroFET-based High Precision Analog Weight Cell with Superior Linearity and Symmetry. 2021 IEEE International Electron Devices Meeting (IEDM), 19.6.1-19.6.4.
  78. Luo, Y. C., Hur, J., Wang, Z., Shim, W., Khan, A. I., & Yu, S. (2021). A Technology Path for Scaling Embedded FeRAM to 28 nm and Beyond With 2T1C Structure. IEEE Transactions on Electron Devices.
  79. Khan, A., Yoo, H. J., Shinde, S. L., & Ravindran, P. V. (2021). Materials opportunities for low-energy computing. MRS Bulletin, 1-5.
  80. Hur, J., Luo, Y. C., Wang, Z., Lombardo, S., Khan, A. I., & Yu, S. (2021). Characterizing Ferroelectric Properties of Hf0.5Zr0.5O2 from Deep-Cryogenic Temperature (4 K) to 400 K. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits.
  81. Tasneem, N., Yousry, Y. M., Tian, M., Dopita, M., Reyes-Lillo, S. E., Kacher, J., … & Khan, A. (2021). A Janovec-Kay-Dunn-Like Behavior at Thickness Scaling in Ultra-Thin Antiferroelectric ZrO2 Films. Advanced Electronic Materials, 7(11), 2100485.
  82. Tasneem, N., Yousry, Y. M., Tian, M., Dopita, M., Reyes-Lillo, S. E., Kacher, J., … & Khan, A. (2021). A Janovec-Kay-Dunn-Like Behavior at Thickness Scaling in Ultra-Thin Antiferroelectric ZrO2 Films (Adv. Electron. Mater. 11/2021). Advanced Electronic Materials, 7(11), 2170049.
  83. Miller, N. E., Wang, Z., Dash, S., Khan, A. I., & Mukhopadhyay, S. (2021). Impact of HKMG and FDSOI FeFET drain current variation in processing-in-memory architectures. Journal of Materials Research, 1-15.
  84. Lombardo, S. F., Tian, M., Chae, K., Hur, J., Tasneem, N., Yu, S., … & Khan, A. (2021). Local epitaxial-like templating effects and grain size distribution in atomic layer deposited Hf0.5Zr0.5O2 thin film ferroelectric capacitors. Applied Physics Letters, 119(9), 092901.
  85. Das, D., & Khan, A. I. (2021). Ferroelectricity in CMOS Compatible Hafnium Oxides: Reviving the Ferroelectric Field-Effect Transistor Technology. IEEE Nanotechnology Magazine.
  86. Lin, B., Choe, G., Hur, J., Khan, A. I., Yu, S., & Wang, H. (2021, June). Experimental RF Characterization of Ferroelectric Hafnium Zirconium Oxide Material at GHz for Microwave Applications. In 2021 Device Research Conference (DRC) (pp. 1-2). IEEE.
  87. Tasneem, N., Islam, M. M., Wang, Z., Chen, H., Hur, J., Triyoso, D., … & Khan, A. (2021). The Impacts of Ferroelectric and Interfacial Layer Thicknesses on Ferroelectric FET Design. IEEE Electron Device Letters.
  88. Garg, C., Chauhan, N., Deng, S., Khan, A. I., Dasgupta, S., Bulusu, A., & Ni, K. (2021). Impact of Random Spatial Fluctuation in Non-Uniform Crystalline Phases on the Device Variation of Ferroelectric FET. IEEE Electron Device Letters.
  89. Miller, N. E., Wang, Z., Dash, S., Khan, A. I., & Mukhopadhyay, S. (2021, June). Characterization of Drain Current Variations in FeFETs for PIM-based DNN Accelerators. In 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS) (pp. 1-4). IEEE.
  90. Hur, J., Luo, Y. C., Wang, Z., Shim, W., Khan, A. I., & Yu, S. (2021, May). A Technology Path for Scaling Embedded FeRAM to 28nm with 2T1C Structure. In 2021 IEEE International Memory Workshop (IMW) (pp. 1-4). IEEE.
  91. Hur, J., Luo, Y. C., Tasneem, N., Khan, A. I., & Yu, S. (2021). Ferroelectric Hafnium Zirconium Oxide Compatible With Back-End-of-Line Process. IEEE Transactions on Electron Devices.
  92. Hoffmann, M., Wang, Z., Tasneem, N., Zubair, A., Ravindran, P. V., Tian, M., … & Khan, A. I. (2021). Antiferroelectric negative capacitance from a structural phase transition in zirconia. arXiv preprint arXiv:2104.10811.
  93. Choe, G., Shim, W., Wang, P., Hur, J., Khan, A. I., & Yu, S. (2021). Impact of Random Phase Distribution in Ferroelectric Transistors-Based 3-D NAND Architecture on In-Memory Computing. IEEE Transactions on Electron Devices, 68(5), 2543-2548.
  94. Tasneem, N., Ravindran, P. V., Wang, Z., Gomez, J., Hur, J., Yu, S., … & Khan, A. I. (2021). Differential charge boost in hysteretic ferroelectric–dielectric heterostructure capacitors at steady state. Applied Physics Letters, 118(12), 122901.
  95. Hur, J., Wang, P., Wang, Z., Choe, G., Tasneem, N., Khan, A. I., & Yu, S. (2020, December). Interplay of switching characteristics, cycling endurance and multilevel retention of ferroelectric capacitor. In 2020 IEEE International Electron Devices Meeting (IEDM) (pp. 39-5). IEEE.
  96. Wang, P., Peng, X., Chakraborty, W., Khan, A. I., Datta, S., & Yu, S. (2020, December). Cryogenic Benchmarks of Embedded Memory Technologies for Recurrent Neural Network based Quantum Error Correction. In 2020 IEEE International Electron Devices Meeting (IEDM) (pp. 38-5). IEEE.
  97. Wang, Z., Islam, M. M., Wang, P., Deng, S., Yu, S., Khan, A. I., & Ni, K. (2020, December). Depolarization Field Induced Instability of Polarization States in HfO 2 Based Ferroelectric FET. In 2020 IEEE International Electron Devices Meeting (IEDM) (pp. 4-5). IEEE.
  98. Khan, A. I., Keshavarzi, A., & Datta, S. (2020). The future of ferroelectric field-effect transistor technology. Nature Electronics, 3(10), 588-597.
  99. Luo, Y. C., Hur, J., Wang, P., Khan, A. I., & Yu, S. (2020). Non-volatile, small-signal capacitance in ferroelectric capacitors. Applied Physics Letters, 117(7), 073501.
  100. Wang, P., Wang, Z., Sun, X., Hur, J., Datta, S., Khan, A. I., & Yu, S. (2020). Investigating ferroelectric minor loop dynamics and history effect—Part II: Physical modeling and impact on neural network training. IEEE Transactions on Electron Devices, 67(9), 3598-3604.
  101. Wang, P., Wang, Z., Sun, X., Hur, J., Datta, S., Khan, A. I., & Yu, S. (2020). Investigating ferroelectric minor loop dynamics and history effect—Part I: Device characterization. IEEE Transactions on Electron Devices, 67(9), 3592-3597.
  102. Hur, J., Tasneem, N., Choe, G., Wang, P., Wang, Z., Khan, A. I., & Yu, S. (2020). Direct comparison of ferroelectric properties in Hf0. 5Zr0. 5O2 between thermal and plasma-enhanced atomic layer deposition. Nanotechnology, 31(50), 505707.
  103. Y Luo, J Hur, P Wang, A. I. Khan and S Yu, “Modeling Multi-states in Ferroelectric Tunnel Junction,” 2020 Device Research Conference (DRC), pp. 1-2, (2020)
  104. S Lombardo, C Nelson, K Chae, S Reyes-Lillo, M Tian, N Tasneem, Z Wang et al. “Atomic-scale imaging of polarization switching in an (anti-) ferroelectric memory material: Zirconia (ZrO2).” In 2020 IEEE Symposium on VLSI Technology, pp. 1-2. (2020).
  105. J Hur, Y-C Luo, PWang, N Tasneem, A. I. Khan, and S Yu. “Ferroelectric tunnel junction optimization by plasma-enhanced atomic layer deposition.” In 2020 IEEE Silicon Nanoelectronics Workshop (SNW), pp. 11-12. (2020)
  106. P Wang, A. I. Khan, S Yu, “Cryogenic behavior of NbO2 based threshold switching devices as oscillation neurons,” Applied Physics Letters (2020)
  107. Hoffmann, M., Ravindran, P. V., & Khan, A. I. “A microscopic “toy” model of ferroelectric negative capacitance.” In 2020 4th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) (pp. 1-4). (2020)
  108. P Wang, W Shim, Z Wang, J Hur, S Datta, AI Khan, S Yu, “Drain-Erase Scheme in Ferroelectric Field Effect Transistor—Part II: 3-D-NAND Architecture for In-Memory Computing,” IEEE Transactions on Electron Devices (2020)
  109. P Wang, Z Wang, W Shim, J Hur, S Datta, AI Khan, S Yu, “Drain-Erase Scheme in Ferroelectric Field-Effect Transistor–Part I: Device Characterization,” IEEE Transactions on Electron Devices (2020)
  110. Z Wang, H Ying, W Chern, S Yu, M Mourigal, JD Cressler, AI Khan, “Cryogenic characterization of a ferroelectric field-effect-transistor,” Applied Physics Letters (2020)
  111. S. Pentapati, R. Perumal, S. Khandelwal, A. I. Khan and S. K. Lim, “Optimal Ferroelectric Parameters for Negative Capacitance Field-Effect Transistors Based on Full-Chip Implementations—Part II: Scaling of the Supply Voltage,” IEEE Transactions on Electron Devices (2020)
  112. S Pentapati, R Perumal, S Khandelwal, AI Khan, SK Lim, “Cross-domain optimization of ferroelectric parameters for negative capacitance transistors—Part I: Constant supply voltage,” IEEE Transactions on Electron Devices (2019)
  113. Z Wang, AI Khan, “Ferroelectric Relaxation Oscillators and Spiking Neurons,” IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (2019)
  114. Y. Long, D. Kim, E. Lee, P. Saha, B. A. Mudassar, X. She, A. I. Khan, S. Mukhopadhyay, “A Ferroelectric FET based Processing-in-Memory Architecture for DNN Acceleration,” IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (2019) (link)
  115. Y. Fang, J. Gomez, Z. Wang, S. Datta, A. I. Khan, A. Raychowdhury. “Neuro-mimetic Dynamics of a Ferroelectric FET Based Spiking Neuron,” IEEE Electron Device Letters (2019) (link)
  116. A. K. Yadav, K. X. Nguyen, Z. Hong, P. García-Fernández, P. Aguado-Puente, C. T. Nelson, S. Das, B. Prasad, D. Kwon, S. Cheema, A. I. Khan, J. Iniguez, J. Junquera, L.-Q. Chen, D. A. Muller, R. Ramesh, S. Salahuddin, “Spatially resolved steady-state negative capacitance,” Nature (2019) (link)
  117. Y. Liu, Z. Wang, T. Orvis, D. Sarkar, R. Kapadia, A. I. Khan, J. Ravichandran, “Epitaxial growth and Dielectric Characterization of Atomically Smooth 0.5Ba(Zr0.2Ti0.8)O3-0.5(Ba0.7Ca0.3)TiO3 thin films,” J. Vac. Sci. Tech. A. 37, 011502 (2019).
  118. Z. Wang, B. Crafton, J. Gomez, R. Xu, A. Luo, Z. Krivokapic, L. Martin, S. Datta, A. Raychowdhury, A. I. Khan, “Experimental Demonstration of Ferroelectric Spiking Neurons for Unsupervised Clustering,” The 64th International Electron Devices Meeting (IEDM 2018), 2018 (paper 13.3, research highlight in Nature Electronics link, pdf ).
  119. A. I. Khan, “On the microscopic origin of negative napacitance in ferroelectric materials: A toy model,” The 64th International Electron Devices Meeting (IEDM 2018), 2018 (invited, paper 9.3).
  120. Y. Long, T. Na, P. Rastogi, K. Rao, A. I. Khan, S Yalamanchili and S. Mukhopadhyay, “A ferroelectric FET based power-efficient architecture for data-intensive computing,” Proc. International Conference on Computer Aided Design (ICCAD), 2018.
  121. N. Tasneem, A. I. Khan, “On the possibility of dynamically tuning and collapsing the ferroelectric hysteresis/memory window in an asymmetric double gate MOS device: A path to a reconfigurable logic-memory device,” Proc. 76th Device Research Conference (DRC), 2018.
  122. Z. Wang*, A. A. Gaskell*, M. Dopita, D. Kriegner, N. Tasneem, J. Mack, N. Mukherjee, Z. Karim, A. I. Khan, “Antiferroelectricity in lanthanum doped zirconia without metallic capping layers and post-deposition/-metallization anneals,” Appl. Phys. Lett. 112, 222902 (2018). (*Equal contribution, Editor’s pick)
  123. M. Hoffmann, A. I. Khan, C. Serrao, Z. Lu, S. Salahuddin, M. Pešić, S. Slesazeck, U. Schroeder, T. Mikolajick. “Ferroelectric negative capacitance domain dynamics,” J. Appl. Phys. 123, 184101 (2018).
  124. Z. Lu, C. Serrao, A. I. Khan, J. D. Clarkson, J .C. Wong, R. Ramesh & S. Salahuddin. “Electrically induced, non-volatile, metal-insulator transition in a ferroelectric-controlled MoS2 transistor,”Appl. Phys. Lett.  112(4), 043107 (2018).
  125. A. I. Khan*, M. Hoffmann*, K. Chatterjee, Z. Lu, R. Xu, C. Serrao, S. Smith, L. W. Martin, C. Hu, R. Ramesh & S.Salahuddin, “Differential voltage amplification from ferroelectric negative capacitance,” Appl. Phys. Lett. 111, 253501 (2017). (Cover article, editor’s pick. *Equal contribution)
  126. Z. Wang, S. Khandelwal & A. I. Khan, “Ferroelectric oscillators and their coupled networks,” IEEE Electron Dev. Lett. 38, 1614 (2017).

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